| MIL 10 Reference
| Customize Help
| Save Settings

MfpgaCommandAlloc



See also
Availability
Available in MIL-Lite
Available in MIL

Available on Windows
Available on Linux

Not supported on:
Not supported on Host system
Not supported on Matrox CronosPlus
Not supported on Matrox GPU processing driver
Not supported on Matrox GigE Vision driver
Not supported on Matrox IEEE 1394 IIDC driver
Not supported on Matrox Iris GT
Not supported on Matrox Morphis
Not supported on Matrox Morphis QxT
Not supported on Matrox Orion HD
Not supported on Matrox USB3 Vision driver (requires Update 19)
Not supported on Matrox Vio
Fully supported on:
Fully supported on Matrox Radient eCL
Fully supported on Matrox Radient eV-CXP
Fully supported on Matrox Solios eA/XA
Fully supported on Matrox Solios ecl/xcl/ev-cl

For any information regarding a MIL system added during a MIL Update, see the MIL system’s release note

Available on Non-Matrox computer
Available on Matrox 4Sight-X
Available on Matrox 4Sight GP
Available on Matrox Supersight
function map Function map
Examples
Previous
Synopsis
Allocate an FPGA command context for a PU in the FPGA configuration loaded in a Processing FPGA on a target system.
Syntax
MIL_INT MfpgaCommandAlloc(
MIL_ID MilSysId, //in
MIL_INT DeviceNumber, //in
MIL_INT FunctionId, //in
MIL_INT SubFunctionId, //in
MIL_INT64 FunctionNumber, //in
MIL_INT ExecutionMode, //in
MIL_INT64 ControlFlag, //in
MIL_FPGA_CONTEXT *FpgaCommandContextPtr //out
)
Description

This function allocates an FPGA command context. An FPGA command context is used to contain the necessary command information to perform the required operation using the specified PU in a Processing FPGA on a target system, without writing it immediately to the target hardware.

Note that the FPGA command context is valid only for the thread on which the current command context is allocated. It cannot be referenced by any other thread.

After calling this function, you should ensure that the context was successfully allocated by verifying that the context handle is not M_NULL. For example, the context will not be allocated if the specified Processing FPGA does not contain the specified PU.

Note that this function reference has not been updated for a MIL system added during a MIL update. Refer to the MIL system's release note to see which MIL system’s documentation you should use in its place and any possible differences.
Parameters
This function is not supported on the selected boards.
This function reference has not been updated for the selected MIL system. To show the content of this page, choose a second MIL system; refer to the MIL system's release note to see which MIL system’s documentation to choose and any possible differences.
Parameters
MilSysId

Specifies the identifier of the system that has the required Processing FPGA.

DeviceNumber

Specifies the Processing FPGA for which to allocate the command context. This parameter must be set to the following value:

function map For specifying the rank of the Processing FPGA
CollapseValue Description
MIL system-specific
tooltip (†)
Collapse M_DEVn

Specifies the rank of the Processing FPGA on the board, where n can be a value between 0 and the total number of Processing FPGAs-1.

j k l m p q r
FunctionId

Specifies the function identifier of the required PU. The function identifier is specified in the header of the required PU's FPGA register file. Instead of directly using the function identifiers for Matrox PUs, you should use their provided equivalent FPGA constant, specified in the PU's reference description in the Matrox FPGA Component Reference. Note that the range of custom PU function identifiers is between 0xFC00 and 0xFFFF, inclusive.

SubFunctionId

Specifies the subfunction identifier of the required PU. Several different variations of a Matrox PU can exist, each with slightly different optimizations, functionalities, or restrictions. Each variation is given a subfunction identifier that uniquely identifies the variation. The subfunction identifier is specified in the header of the required PU's FPGA register file. You can set this parameter to one of the following:

function map For specifying the subfunction identifier
CollapseValue Description
MIL system-specific
tooltip (†)
Collapse M_DEFAULT

Indicates that the subfunction identifier is ignored. Use this setting if the instances of the PU with the specified function identifier in your FPGA configuration all have the same subfunction identifier. Note that you should also use this setting when using a custom PU.

(summarize)
j k l m p q r
Collapse Value > 0

Specifies the subfunction identifier of the required PU. Note that only Matrox PUs have subfonction identifiers. For their identifiers, see the Matrox FPGA Component Reference.

(summarize)
j k l m p q r
FunctionNumber

Specifies the PU to use when two or more instances, with the same function identifier and subfunction identifier, are present in a FPGA configuration loaded in a Processing FPGA. This parameter can be set to the following value:

function map For specifying the PU to use
CollapseValue Description
MIL system-specific
tooltip (†)
Collapse M_DEFAULT

Same as M_ANY.

j k l m p q r
Collapse M_ANY

Specifies that any of the PUs with the specified function identifier and subfunction identifier can be used.

j k l m p q r
Collapse M_DEVn

Specifies the rank of the PU in the FPGA configuration loaded in the Processing FPGA, where n represents the specific PU instance starting from 0. The higher the instance's register base address, the higher the rank.

(summarize)
j k l m p q r
ExecutionMode INQ

Specifies how the processing operation should be issued on the system command queue. This parameter should be set to one of the following values:

function map For specifying whether the processing operation is asynchronous or synchronous
CollapseValue Description
MIL system-specific
tooltip (†)
Collapse M_ASYNCHRONOUS

Specifies that, after the command is queued, the thread continues executing without waiting for the operation to complete.

j k l m p q r
Collapse M_SYNCHRONOUS

Specifies that, after the command is queued, the thread waits for the processing operation to complete before continuing.

j k l m p q r
ControlFlag

Reserved for future expansion. Set this parameter to M_DEFAULT.

FpgaCommandContextPtr

Specifies the address of the variable in which to write the handle of the FPGA command context. The command context is valid only for the thread on which the command context is allocated. It cannot be referenced by any other thread.

Return value
The returned value is M_VALID if allocation is successful. If allocation fails, M_NULL is returned.
Compilation information
Header Include mil.h; milfpga.h.
Library Use mil.lib; milfpga.lib.
DLL Requires mil.dll; milfpga.dll.
DEVn DEFAULT DEFAULT ANY DEVn ASYNCHRONOUS SYNCHRONOUS