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MfpgaSetLink


See also
Availability
Available in MIL-Lite
Available in MIL

Available on Windows
Available on Linux

Not supported on:
Not supported on Host system
Not supported on Matrox CronosPlus
Not supported on Matrox GPU processing driver
Not supported on Matrox GigE Vision driver
Not supported on Matrox IEEE 1394 IIDC driver
Not supported on Matrox Iris GT
Not supported on Matrox Morphis
Not supported on Matrox Morphis QxT
Not supported on Matrox Orion HD
Not supported on Matrox USB3 Vision driver (requires Update 19)
Not supported on Matrox Vio
Fully supported on:
Fully supported on Matrox Radient eCL
Fully supported on Matrox Radient eV-CXP
Fully supported on Matrox Solios eA/XA
Fully supported on Matrox Solios ecl/xcl/ev-cl

For any information regarding a MIL system added during a MIL Update, see the MIL system’s release note

Available on Non-Matrox computer
Available on Matrox 4Sight-X
Available on Matrox 4Sight GP
Available on Matrox Supersight
function map Function map
Examples
MfpgaSetDestination
MfpgaSetRegister
Synopsis
Cascade the PUs of two commands, such that a stream output of one PU is routed to a stream input port of the other PU.
Syntax
void MfpgaSetLink(
MIL_FPGA_CONTEXT SrcFpgaCommandContext, //in
MIL_INT SrcStreamPort, //in
MIL_FPGA_CONTEXT DstFpgaCommandContext, //in
MIL_INT DstStreamPort, //in
MIL_INT64 ControlFlag //in
)
Description

This function cascades (links) the ports of two PUs that are interconnected in the FPGA configuration and loaded in a Processing FPGA. This function allows you to route data from one PU's stream output port to the specified stream input port of another PU.

Note that this function reference has not been updated for a MIL system added during a MIL update. Refer to the MIL system's release note to see which MIL system’s documentation you should use in its place and any possible differences.
Parameters
This function is not supported on the selected boards.
This function reference has not been updated for the selected MIL system. To show the content of this page, choose a second MIL system; refer to the MIL system's release note to see which MIL system’s documentation to choose and any possible differences.
Parameters
SrcFpgaCommandContext

Specifies the handle of the FPGA command context to use in the link.

SrcStreamPort

Specifies the stream output port of the PU associated with the source command context. You must set this parameter to the following value:

function map For specifying the rank of the stream output port
CollapseValue Description
MIL system-specific
tooltip (†)
Collapse M_OUTPUTn

Specifies the rank of the PU's stream output port to use in the link. You must set n to a value between 0 and 9, inclusive.

(summarize)
† j k l m p q r
DstFpgaCommandContext

Specifies the handle of the destination command context to use in the link.

DstStreamPort

Specifies the stream input port of the PU associated with the destination command context. You must set this parameter to the following value:

function map For specifying the rank of the stream input port
CollapseValue Description
MIL system-specific
tooltip (†)
Collapse M_INPUTn

Specifies the rank of the PU's stream input port to use as the destination stream port. You can set n to a value between 0 and 9, inclusive.

(summarize)
† j k l m p q r
ControlFlag

Reserved for future expansion. Set this parameter to M_DEFAULT.

Compilation information
Header Include mil.h; milfpga.h.
Library Use mil.lib; milfpga.lib.
DLL Requires mil.dll; milfpga.dll.
OUTPUTn INPUTn