MIL_ID MilSysId, | //in |
MIL_INT DeviceNumber, | //in |
MIL_INT FunctionId, | //in |
MIL_INT SubFunctionId, | //in |
MIL_INT64 FunctionNumber, | //in |
MIL_INT ExecutionMode, | //in |
MIL_INT64 ControlFlag, | //in |
MIL_FPGA_CONTEXT *FpgaCommandContextPtr | //out |
This function allocates an FPGA command context. An FPGA command context is used to contain the necessary command information to perform the required operation using the specified PU in a Processing FPGA on a target system, without writing it immediately to the target hardware.
Note that the FPGA command context is valid only for the thread on which the current command context is allocated. It cannot be referenced by any other thread.
After calling this function, you should ensure that the context was successfully allocated by verifying that the context handle is not M_NULL. For example, the context will not be allocated if the specified Processing FPGA does not contain the specified PU.
Specifies the Processing FPGA for which to allocate the command context. This parameter must be set to the following value:
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Description |
MIL system-specific tooltip (‡) |
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Specifies the rank of the Processing FPGA on the board, where n can be a value between 0 and the total number of Processing FPGAs-1. |
‡ | j | k M10 |
l | m | p | r U27 |
y U75 |
aa |
Specifies the function identifier of the required PU. The function identifier is specified in the header of the required PU's FPGA register file. Instead of directly using the function identifiers for Matrox PUs, you should use their provided equivalent FPGA constant, specified in the PU's reference description in the Matrox FPGA Component Reference. Note that the range of custom PU function identifiers is between 0xFC00 and 0xFFFF, inclusive.
Specifies the subfunction identifier of the required PU. Several different variations of a Matrox PU can exist, each with slightly different optimizations, functionalities, or restrictions. Each variation is given a subfunction identifier that uniquely identifies the variation. The subfunction identifier is specified in the header of the required PU's FPGA register file. You can set this parameter to one of the following:
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Description |
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Indicates that the subfunction identifier is ignored. Use this setting if the instances of the PU with the specified function identifier in your FPGA configuration all have the same subfunction identifier. Note that you should also use this setting when using a custom PU. (summarize)Indicates that the subfunction identifier is ignored. (more details...) |
‡ | j | k M10 |
l | m | p | r U27 |
y U75 |
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Specifies the subfunction identifier of the required PU. Note that only Matrox PUs have subfunction identifiers. For their identifiers, see the Matrox FPGA Component Reference. (summarize)Specifies the subfunction identifier of the required PU. (more details...) |
‡ | j | k M10 |
l | m | p | r U27 |
y U75 |
aa |
Specifies the PU to use when two or more instances, with the same function identifier and subfunction identifier, are present in a FPGA configuration loaded in a Processing FPGA. This parameter can be set to the following value:
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Description |
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Same as M_ANY. |
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y U75 |
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Specifies that any of the PUs with the specified function identifier and subfunction identifier can be used. |
‡ | j | k M10 |
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Specifies the rank of the PU in the FPGA configuration loaded in the Processing FPGA, where n represents the specific PU instance starting from 0. The higher the instance's register base address, the higher the rank. (summarize)Specifies the rank of the PU in the FPGA configuration loaded in the Processing FPGA, where n represents the specific PU instance starting from 0. (more details...) |
‡ | j | k M10 |
l | m | p | r U27 |
y U75 |
aa |
Specifies how the processing operation should be issued on the system command queue. This parameter should be set to one of the following values:
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Description |
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Specifies that, after the command is queued, the thread continues executing without waiting for the operation to complete. |
‡ | j | k M10 |
l | m | p | r U27 |
y U75 |
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Specifies that, after the command is queued, the thread waits for the processing operation to complete before continuing. |
‡ | j | k M10 |
l | m | p | r U27 |
y U75 |
aa |
Header | Include mil.h; milfpga.h. |
Library | Use mil.lib; milfpga.lib. |
DLL | Requires mil.dll; milfpga.dll. |